1. Field
The present invention generally relates to memory controller synchronization and, in particular, relates to auto-recovery, fault tolerant synchronization of memory controllers.
2. Background
For space-based or high-reliability systems using memory controllers internal to Field Programmable Gate Arrays (“FPGAs”), radiation effects are a major concern. In applications with streaming data or other data flow, upsets in the internal memory structures can have both short- and long-term consequences to the validity of the information stored therein.
Other approaches to addressing this problem have compared write and read counters and stopped or interrupted the process on any overflow (i.e., when the write counter exceeds the read counter) or underflow (i.e., when the read counter exceeds the write counter). These approaches also use conditional flag generation (e.g., flags such as FULL, EMPTY, etc.) to start or stop the data flow.
These approaches present a number of problems because of their asynchronous signaling properties, which can generate glitches instead of valid signals when checking for FULL, EMPTY, or other conditions. Moreover, in case of faults, these approaches are not self-synchronizing and require additional circuitry or processing to recover from fault conditions.